The present invention relates to non-volatile memory devices such as electrically erasable programmable read-only memory devices (EEPROMS).
U.S. Pat. No. 6,842,372 is entitled “EEPROM cell having a floating gate transistor within a cell well and a process for fabricating the memory cell” and is hereby incorporated by reference herein.
U.S. Pat. No. 6,979,853 discloses a DRAM and is hereby incorporated by reference herein.